Personally I appreciate when things are written in plain language rather than using insider jargon, even when the intended audience likely knows what the jargon means.
No it is not at all Neoverse V2, which is obsolete and has much lower performance.
It is a custom Armv9.3-A design (same ISA like the Arm C1 CPUs from the flagship smartphones of 2026), but it has double-width execution units for SVE2 (i.e. 256-bit width, vs. 128-bit for the other Arm CPUs) and it has some ISA extensions for AI/ML, e.g. instructions for inference with FP8 (BF16 is already supported by the standard Arm ISA).
Despite the fact that Armv9.3-A may include SME (scalable matrix extension, like in the Apple CPUs and in the Arm C1 CPUs), Fujitsu did not mention SME, so I assume that they did not implement it and they rely on their enhanced SVE2 (which is not surprising, while the origin of Arm SME is at Apple, the origin of Arm SVE is at Fujitsu).
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